A chip scale package (CSP) is a type of integrated circuit chip carrier. In order to qualify as chip scale, the package typically has an area no greater than 1.2 times that of the die and it is a single-die, direct surface mountable package. Another criterion that is often applied to qualify these packages as CSPs is their ball pitch should be no more than 1 mm.
The die may be mounted on an interposer upon which pads or balls are formed, like with flip chip ball grid array (BGA) packaging, or the pads may be etched or printed directly onto the silicon wafer, resulting in a package very close to the size of the silicon die. Such a package is called a wafer-level chip-scale package (WL-CSP) or a wafer-level package (WLP).
Other features of the present embodiments will be apparent from the accompanying drawings and from the detailed description that follows.